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Duolog Tools Auto-generate OVM Verification Environment

Duolog Technologies today announced that its award-winning Socrates chip integration platform can now auto-generate a complete OVM verification environment, using version 1.0 of the OVM register package recently released by Mentor Graphics. Auto-generating a complete OVM verification environment liberates verification teams from the tedious and error-prone task of building and debugging verification environments, allowing them to concentrate on verifying their designs.

“As a member of the Mentor Graphics Questa Vanguard Partnership (QVP) program, Duolog demonstrates the benefits of collaboration to advance verification productivity,” said Dennis Brophy, director of strategic business development, Mentor Graphics. “Duolog’s OVM auto-generation solution accelerates significant user adoption of the OVM 1.0 Register Package.”

The Socrates platform is an Eclipse-based suite of tools for assembling complex SoC, ASIC and FPGA designs. Socrates employs extensive DRC checks to verify design integrity and includes a fully-customizable suite of output generators to auto-create design, verification and software collateral. Auto-generation of design views from a central, verified source ensures that engineering teams remain synchronized at all times, and that costly bugs due to misalignment, miscommunication or misinterpretation are eradicated.

Duolog will be attending DVCon in San Jose, CA from February 22-25. Duolog’s CTO, David Murray, will be demonstrating how the Socrates OVM generators can propel their customers into the highly-productive world of OVM-based verification with minimal effort.

About Duolog Technologies

Duolog Technologies is an award-winning developer of EDA tools that enable the flawless and rapid integration of today’s increasingly-complex SoC, ASIC and FPGA designs. Duolog’s Socrates chip integration platform employs a modular and extensible suite of tools for I/O layer definition, IP packaging, connectivity and register management.

About OVM Register Package

Open Verification Methodology is the first open, language-interoperable verification methodology in the industry. It provides a methodology and accompanying libraries that allow users to create modular, reusable verification environments in which components communicate with each other via standard transaction-level modeling interfaces. The OVM register package provides a simple, easy-to-use and easy-to-extend data model and API for modeling registers, address maps and memories. More information can be found at

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